Vision systems based on the 128×128 focal plane cellular visual microprocessor chips

Author

Zarándy, Á ; Rekeczky, Cs ; Szatmari, I.

Author_Institution

Comput. & Autom. Res. Inst., Hungarian Acad. of Sci., Budapest, Hungary

Volume

3

fYear

2003

fDate

25-28 May 2003

Abstract

Focal plane cellular visual microprocessor chip development reached the necessary technology level that it can be applied in industrial vision systems. These TeraOPS speed, internally analog visual chips can capture and process thousands of medium resolution images in a second. The price for this extraordinary high speed is that their hardware-software environment and programming method is far from trivial. In this paper, we discuss architecture considerations, and introduce a standalone vision system family development case study.

Keywords

CMOS analogue integrated circuits; CMOS image sensors; analogue processing circuits; cellular neural nets; image processing equipment; microprocessor chips; neural chips; stereo image processing; CNNs; TeraOPS; analog visual chips; cellular image processing chips; chip architecture; focal plane cellular visual microprocessor chip; high frame-rate; industrial vision systems; standalone vision system family development; Cellular neural networks; Computer architecture; Convolution; Image resolution; Image segmentation; Intelligent sensors; Machine vision; Microprocessor chips; Morphology; Sensor arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1205070

Filename

1205070