Behavioral modeling and simulation of high-speed analog-to-digital converters using SystemC

Author

Bjornsen, J. ; Ytterdal, Trond

Author_Institution

Dept. of Phys. Electron., Norwegian Inst. of Sci. & Technol., Trondheim, Norway

Volume

3

fYear

2003

fDate

25-28 May 2003

Abstract

This work presents a software framework for rapid behavioral modeling and simulation of analog-to-digital converters (ADCs). The framework is based on the SystemC C++ class libraries and has proven to be an effective tool for exploring different system-level architectures in the early stages of the design process. Post-processing analysis tools are included for static and dynamic performance calculation. To compare the performance of our SystemC framework with Verilog, a 12 bit pipelined ADC is modeled and simulated, and we report on the results of the comparison.

Keywords

analogue-digital conversion; circuit simulation; hardware description languages; high-speed integrated circuits; integrated circuit design; pipeline processing; software tools; 12 bit; SystemC C++ class libraries; SystemC framework; Verilog; design process; dynamic performance calculation; high-speed analog-to-digital converters; pipelined ADC; post-processing analysis tools; rapid behavioral modeling; simulation; software framework; static performance calculation; system-level architectures; Analog-digital conversion; Capacitors; Computer languages; Hardware design languages; Mathematical model; Performance analysis; Process design; Silicon; Time to market; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1205167

Filename

1205167