Physical scaling of integrated inductor layout and model and its application to WLAN VCO design at 11GHz and 17GHz

A physical scaling procedure of integrated inductors is presented. The process consists of a linear layout geometry scaling and a linear or quadratic scaling of the double π-model parameters according to their physical meaning. The proposed coil scaling is verified in 0.25μm standard CMOS with measurements on fully integrated optimized inductors. The scaling allows a reuse of measured coils and can be used to reduce the size of coil libraries. The inductor scaling is shown as very useful for VCO-design reuse. This is illustrated in 0.12μm standard CMOS by the design of fully integrated low power low phase noise VCOs at 11GHz and 17GHz out of a 51GHz VCO.