Title :
Bonding-pad-oriented on-chip ESD protection structures for ICs
Author :
Feng, H. ; Zhan, R. ; Chen, G. ; Wu, Q. ; Guang, X. ; Xie, H. ; Wang, A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Abstract :
Several bonding-pad-oriented ESD protection structures, including a ggCMOS, an LVSCR and an all-direction ESD structures are reported, implemented in commercial 0.35 μm CMOS and 0.6 μm BiCMOS. Measurements agree with simulations well. HBM ESD zapping tests passed 2 kV, 4.4 kV and 14 kV, respectively. The structures are suitable ESD protection solutions for RF, mixed-signal and high-pin-count ICs.
Keywords :
BiCMOS integrated circuits; CMOS integrated circuits; circuit simulation; electrostatic discharge; integrated circuit design; integrated circuit testing; thyristors; 0.35 micron; 0.6 micron; 14 kV; 2 kV; 4.4 kV; BiCMOS; HBM ESD zapping tests; IC ESD protection; LVSCR; RF IC; SCR ESD protection; all-direction ESD structures; bonding-pad-oriented ESD protection structures; ggCMOS; grounded-gate CMOS; high-pin-count IC; low-voltage silicon controlled rectifier; mixed-mode simulation; mixed-signal IC; on-chip electro-static discharge protection circuits; BiCMOS integrated circuits; Bonding; CMOS technology; Electrostatic discharge; MOS devices; Protection; Radio frequency; Silicon; Thyristors; Voltage;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1205670
