Title :
Pulse extraction: a digital power spectrum estimation method for adaptation of Gbps equalizers
Author :
Lin, Xiaofeng ; Zhang, Guangbin ; Liu, Jin
Author_Institution :
Dept. of Electr. Eng., Texas Univ., Richardson, TX, USA
Abstract :
This paper presents a new method to estimate the power spectrum of a digital signal, which is used to generate an error signal to tune the FIR filter in a Gbps data rate adaptive equalizer for digital communication. The proposed error detection circuit is composed of standard digital logic circuit and a phase lock loop (PLL), thus it is scalable to higher-speed processes beyond the GHz range. Matlab simulation shows that the proposed method can achieve the same bit error rate performance with the one using a bandpass filter to estimate the power spectrum, but with largely reduced power dissipation and chip area. Fabricated in TSMC CMOS 0.35 μm technology, the pulse extractor and its tuning circuit occupy 0.075 mm2.
Keywords :
CMOS integrated circuits; FIR filters; adaptive equalisers; adaptive filters; circuit simulation; circuit tuning; error detection; error statistics; integrated circuit design; integrated circuit measurement; phase locked loops; pulse analysers; 0.35 micron; BER; CMOS pulse extractor; FIR filter tuning; PLL; adaptive equalizers; bit error rate performance; chip area reduction; digital communication; digital logic error detection circuit; digital signal power spectrum estimation; equalization filter transfer function tuning; error signal generation; phase lock loop; power dissipation reduction; pulse extraction; Adaptive equalizers; CMOS technology; Circuits; Data mining; Digital communication; Finite impulse response filter; Phase detection; Power generation; Signal generators; Spectral analysis;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1205672
