Title :
A mixed-signal calibration technique for low-voltage CMOS 1.5-bit/stage pipeline data converters
Author :
Guo, Jianjun ; Law, Waisiu ; Peach, Charles T. ; Helms, Ward J. ; Allstot, David J.
Author_Institution :
Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA
Abstract :
A mixed analog/digital calibration technique for low-voltage CMOS pipeline A/D converters is presented. It provides high linearity over a large full-scale voltage range while operating at low power supply voltages. Extensive HSPICE simulation results are used to characterize the nonlinearity of a typical CMOS folded-cascode operational amplifier, and the new correction algorithm is validated using MATLAB behavioral simulations. A 10-bit converter requires only two additional calibration stages and achieves a full-scale range of 1.5Vpp using a single 1.8V power supply. The simulated DNL and INL values are 0.67LSB and 0.58LSB, respectively, and the effective number of bits is 9.6.
Keywords :
CMOS integrated circuits; SPICE; analogue-digital conversion; calibration; low-power electronics; mixed analogue-digital integrated circuits; operational amplifiers; pipeline processing; 1.8 V; 10 bit; HSPICE simulation; MATLAB behavioral simulation; correction algorithm; folded-cascode operational amplifier; full-scale voltage range; low-voltage CMOS pipeline A/D converter; mixed-signal calibration; Analog-digital conversion; CMOS technology; Calibration; Circuits; Harmonic distortion; Linearity; Low voltage; Operational amplifiers; Pipelines; Power supplies;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1205707
