A 1 V, 12-bit wideband continuous-time ΣΔ modulator for UMTS applications

Author

Gerfers, Friedel ; Ortmanns, Maurits ; Manoli, Yiannos

Author_Institution

Inst. of Microelectron., Freiburg Univ., Germany

Volume

1

fYear

2003

fDate

25-28 May 2003

Abstract

A third-order continuous-time ΣΔ analog-to-digital converter (ADC) suitable for converting input frequencies up to 2MHz is presented. Various design optimizations regarding the overall power consumption as well as the very low supply voltage are demonstrated. The ΣΔ modulator provides a dynamic range (DR) and signal-to-noise+distortion ratio (SNDR) of 78dB and 74dB, respectively. Operating with a single supply voltage of only 1V the modulator consumes 3mW. The chip was integrated in a 0.18μm CMOS technology, occupying a chip area of 1mm².

Keywords

3G mobile communication; CMOS integrated circuits; continuous time systems; integrated circuit layout; low-power electronics; sigma-delta modulation; 0.18 micron; 1 V; 12 bit; 2 MHz; 3 mW; CMOS; SNDR; UMTS applications; analog-to-digital converter; design optimizations; dynamic range; low supply voltage; overall power consumption; signal-to-noise+distortion ratio; wideband continuous-time ΣΔ modulator; 3G mobile communication; Bandwidth; Baseband; Circuit noise; Delta modulation; Noise level; Noise reduction; Quantization; Signal to noise ratio; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1205715

Filename

1205715