Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators

Author

Ortmanns, Muurits ; Gerfers, Friedel ; Manoli, Yiannos

Author_Institution

Freiburg Univ., Germany

Volume

1

fYear

2003

fDate

25-28 May 2003

Abstract

This paper examines the influence of different clock jitter forms on the performance of discrete-time and continuous-time sigma-delta modulators, the latter with rectangular and with decaying feedback pulse form. It could be shown that the so called accumulative clock jitter from a VCO is the fundamental, performance limiting factor for all architectures, which can not be circumvented, limiting the maximum achievable signal-noise ratio.

Keywords

circuit feedback; circuit simulation; jitter; sigma-delta modulation; voltage-controlled oscillators; SNR; VCO; accumulative clock jitter; clock jitter forms; continuous-time sigma delta modulators; decaying feedback pulse form modulator; discrete sigma delta modulators; fundamental jitter insensitivity limits; maximum achievable signal-noise ratio; performance limiting factor; rectangular feedback pulse form; Clocks; Delta modulation; Delta-sigma modulation; Feedback; Jitter; Pulse modulation; Pulse width modulation; Sampling methods; Space vector pulse width modulation; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Conference_Location

Bangkok

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1205744

Filename

1205744