DocumentCode :
396459
Title :
A 10.7-MHz bandpass sigma-delta modulator using double-delay single-opamp SC resonator with double-sampling
Author :
Chon-In Lao
Author_Institution :
Fac. of Sci. & Technol., Univ. of Macau, China
Volume :
1
fYear :
2003
fDate :
25-28 May 2003
Abstract :
The design of a 10.7-MHz 4th-order fs/4 bandpass sigma-delta modulator with a double-delay single-opamp resonator plus double-sampling technique is proposed for GSM standard. The circuit is implemented in 0.35-μm double-poly, triple-metal CMOS process. Both behavioral-level and transistor-level simulation results are presented, and the circuit is expected to achieve >80 dB dynamic range, occupying 0.15 mm2 active area and less than 12mW power consumption at 2.5V supply.
Keywords :
CMOS integrated circuits; circuit resonance; delay circuits; operational amplifiers; sigma-delta modulation; switched capacitor networks; 0.35 micron; 10.7 MHz; 12 mW; 2.5 V; CMOS bandpass sigma-delta modulator; GSM; behavioral-level simulation; double sampling; double-delay single-opamp switched-capacitor resonator; dynamic range; transistor-level simulation; Band pass filters; CMOS technology; Circuit simulation; Delay; Delta-sigma modulation; Digital filters; Energy consumption; Filtering; Transfer functions; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
Type :
conf
DOI :
10.1109/ISCAS.2003.1205750
Filename :
1205750
Link To Document :
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