A continuous flow mixed-radix FFT architecture with an in-place algorithm

The paper proposes a fast Fourier transform (FFT) architecture to satisfy both small area and high speed. The proposed architecture uses the mixed-radix algorithm based on the radix-4 and radix-2 algorithms and the memory bank structure for high speed real-time processing. To satisfy the small area requirement, it uses an in-place memory strategy that stores butterfly outputs in the same memory location used by butterfly inputs. To meet real-time processing, this paper proposes a continuous flow architecture using only two N-word memories for the mixed-radix algorithm. The proposed architecture can reduce the number of clock cycles about 70% compared with an existing architecture.