An embedded merging scheme for H.264/AVC motion estimation

The emerging H.264/AVC video coding standard takes 50% performance improvement than the H.263. One of the key successful factors is to employee the variable block size matching algorithm in the motion compensation stage. However, the highly computational complexity leads the codec become too complex and hard to implement in some real time applications. Again, large memory requirement to save the middle results limits its usage, too. In this paper, we proposed an embedded merging scheme for fast full search algorithm of H.264/AVC. The proposed scheme cannot only reduce the computation complexity but also provides a better way to be implemented in VLSI hardware.