Title :
Geometric dependencies of parasitic capacitances in interconnection buses
Author :
Jarosz, A. ; Pfitzner, A.
Author_Institution :
Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Poland
Abstract :
Increasing complexity of modern integrated circuits causes the importance of effects occurring in interconnections, such as delay and crosstalk, to grow. These effects are determined by parasitic elements corresponding to the connection lines. In this paper we discuss the influence of geometrical configuration of the bus on parasitic capacitances. Suitable formulas for improving accuracy of capacitance models have been developed.
Keywords :
capacitance; circuit CAD; circuit simulation; crosstalk; delays; integrated circuit interconnections; integrated circuit modelling; statistical analysis; capacitance models; connection lines; crosstalk; delay; geometric dependencies; integrated circuit complexity; interconnection buses; interconnection effects; interconnection geometrical configuration; parasitic capacitances; parasitic elements; statistical simulation; Circuit simulation; Crosstalk; Delay effects; Integrated circuit interconnections; Joining processes; Microelectronics; Modems; Parasitic capacitance; Usability; Very large scale integration;
Conference_Titel :
CAD Systems in Microelectronics, 2003. CADSM 2003. Proceedings of the 7th International Conference. The Experience of Designing and Application of
Print_ISBN :
966-553-278-2
DOI :
10.1109/CADSM.2003.1255064
