Title :
Placement method targeting predictability robustness and performance
Author :
Ababei, C. ; Bazargan, K.
Author_Institution :
Electr. & Comput. Eng. Dept., Minnesota Univ., Minneapolis, MN, USA
Abstract :
We study the relationship between robustness, predictability and performance of VLSI circuits. It is shown that predictability and performance are conflicting objectives. Performance and robustness are statically conflicting objectives but they are statistically non-conflicting. We propose and develop means for changing a standard timing-driven partitioning-based placement algorithm in order to design more predictable and robust circuits without sacrificing much of performance.
Keywords :
VLSI; integrated circuit design; statistical analysis; VLSI circuit performance; predictability; predictable circuits design; robust circuits design; standard timing driven partitioning based placement algorithm; Circuits; Delay; Design methodology; Noise robustness; Predictive models; Process design; Standards development; Timing; Uncertainty; Very large scale integration;
Conference_Titel :
Computer Aided Design, 2003. ICCAD-2003. International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
1-58113-762-1
DOI :
10.1109/ICCAD.2003.159674
