DocumentCode
400766
Title
Communication-aware task scheduling and voltage selection for total systems energy minimization
Author
Varatkar, Girish ; Marculescu, Radu
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2003
fDate
9-13 Nov. 2003
Firstpage
510
Lastpage
517
Abstract
In this paper, we present an interprocessor communication-aware task scheduling algorithm applicable to a multiprocessor system executing an application with dependent tasks. Our algorithm takes the application task graph and the architecture graph as inputs, assigns the tasks to processors and then schedules them. As main theoretical contribution, the algorithm we propose reduces the overall systems energy by (i) reducing the total interprocessor communication and (ii) executing certain cycles at a lower voltage level. Experimental results show that by tuning the parameter for communication awareness, a schedule using our algorithm can reduce up to 80% interprocessor communication in a complex video/audio application (compared to a schedule which is only voltage-selection aware) without losing much in the number of cycles executed at lower voltage.
Keywords
microprocessor chips; minimisation; multimedia communication; processor scheduling; application task graph; architecture graph; communication awareness; interprocessor communication; multiprocessor system; task scheduling algorithm; total systems energy minimization; video/audio application; voltage selection; Application software; Computer architecture; Dynamic voltage scaling; Embedded system; Energy management; Minimization; Multiprocessing systems; Power system management; Processor scheduling; Scheduling algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Aided Design, 2003. ICCAD-2003. International Conference on
Conference_Location
San Jose, CA, USA
Print_ISBN
1-58113-762-1
Type
conf
DOI
10.1109/ICCAD.2003.159732
Filename
1257859
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