A heuristic to determine low leakage sleep state vectors for CMOS combinational circuits

Input vector control has been used to minimize the leakage power consumption of a circuit in sleep state. In this paper, we present a novel heuristic for determining a low leakage vector to be applied to a circuit in sleep state. The heuristic is a greedy search based on the controllability of nodes in the circuit and uses the functional dependencies among cells in the circuit to guide the search. Results on a set of ISCAS and MCNC benchmark circuits show that in all cases our heuristic returns a vector having a leakage within 5% of that of the vector obtained using an extensive random search, with orders of magnitude improvement in computational speed.