Statistical verification of power grids considering process-induced leakage current variations

Transistor threshold voltages (V/sub th/) have been reduced as part of on-going technology scaling. The smaller V/sub th/ values feature increased variations due to underlying process variations, with a strong within-die component. Correspondingly, given the exponential dependence of leakage on V/sub th/, circuit leakage currents are increasing significantly and have strong within-die statistical variations. With these leakage currents loading the power grid, the grid develops correspondingly large statistical voltage drops. This leakage-induced voltage drop is an unavoidable background level of noise on the grid. Any additional non-leakage currents due to circuit activity will lead to voltage drop which is to be added to this background noise. We propose a technique for checking whether the statistical voltage drop on every node is within user-specified bounds, given user-specified statistics of the leakage currents.