Implications of halo and well implant conditions on sub-140nm device technologies

Author

Foad, M.A. ; Doherty, Rohan ; Ito, H. ; Matsunaga, Yusuke ; Mitsuda, Kazuhisa ; Honda, Masakazu ; Ikeda, Shoji ; Hess, Daniel

fYear

2002

fDate

27-27 Sept. 2002

Firstpage

369

Lastpage

372

Abstract

With the increase in device complexity, the drive for higher performance and yield, to improve lab profitability, has led to tighter requirements for uniformity and repeatability of the ion implant steps. In particular, implants such as the Halo and well, where the device parametrics, e.g. threshold voltage (VI), leakage current and breakdown voltage are strongly affected. In this paper, a TCAD sensitivity study of Halo implant angle effect on V_t has been conducted and verified on PMOS devices. Device wafer splits were also conducted on the effect of well and Halo implants. Parametrics of N well implant splits will be presented.

Keywords

batch processing (industrial); integrated circuit yield; ion implantation; leakage currents; nanoelectronics; process control; semiconductor process modelling; technology CAD (electronics); PMOS devices; TCAD sensitivity; batch high energy implanters; breakdown voltage; device complexity; device parametrics; device wafer splits; halo implant conditions; ion implantation; lab profitability; leakage current; process control; repeatability; single wafer medium current implanters; threshold voltage; tilt angle effect; uniformity; well implant conditions; yield; Conducting materials; Implants; Indium tin oxide; Leakage current; Logic devices; MOS devices; Process control; Profitability; Springs; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Ion Implantation Technology. 2002. Proceedings of the 14th International Conference on

Conference_Location

Taos, New Mexico, USA

Print_ISBN

0-7803-7155-0

Type

conf

DOI

10.1109/IIT.2002.1258017

Filename

1258017