A 2.5 GHz CMOS fully-integrated ΔΣ-controlled fractional-N frequency synthesizer

Author

Dehghani, Rasoul

Author_Institution

Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran

fYear

2004

fDate

2004

Firstpage

163

Lastpage

167

Abstract

The design of a fully-integrated ΔΣ-controlled fractional-N frequency synthesizer is described. Using a dual modulus 64/72 prescaler based on injection locking technique and a novel third order digital ΔΣ modulator, we achieved an extremely low power synthesizer in 2.5 GHz band. Total power dissipation of the frequency synthesizer is less than 6 mW at a 1.5 V supply. The loop bandwidth is optimized to achieve a -123 dBc/Hz phase noise at 3 MHz offset frequency. The locking time of the loop is less than 30 μs.

Keywords

CMOS integrated circuits; delta-sigma modulation; frequency synthesizers; integrated circuit noise; prescalers; voltage-controlled oscillators; 1.5 V; 2.5 GHz; 3 MHz; 6 mW; CMOS fully integrated ΔΣ synthesizer; digital ΔΣ modulator; fractional-N frequency synthesizer; injection locking technique; locking time; loop bandwidth; low power synthesizer; offset frequency; power dissipation; Frequency synthesizers; Logic; MOSFETs; Noise figure; Phase noise; Quantization; Tail; Transfer functions; Very large scale integration; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 2004. Proceedings. 17th International Conference on

Print_ISBN

0-7695-2072-3

Type

conf

DOI

10.1109/ICVD.2004.1260919

Filename

1260919