• DocumentCode
    402457
  • Title

    0.13μm low voltage logic based RF CMOS technology with 115GHz fT and 80GHz fMAX

  • Author

    Guo, J.C. ; Huang, C.H. ; Chan, K.T. ; Lien, W.Y. ; Wu, C.M. ; Sun, Y.C.

  • Author_Institution
    Dept. of Electron. Eng., National Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    2
  • fYear
    2003
  • fDate
    7-9 Oct. 2003
  • Firstpage
    683
  • Abstract
    Superior RF CMOS of 115 fT and 80GHz fMAX has been realized by 0.13μm low voltage logic based RF CMOS technology by aggressive device scaling and optimized layout. NFmin of 2.2 dB at 10GHz is achieved even without deep N-well and ground-shielded signal pad. P1dB of near 10dBm can fit Bluetooth requirement and 55% PAE at 2.4GHz address the good potential of sub-100nm CMOS for low voltage RF power applications.
  • Keywords
    CMOS logic circuits; circuit optimisation; integrated circuit layout; radiofrequency integrated circuits; 0.13 microns; 115 GHz; 2.2 dB; 2.4 GHz; 80 GHz; Bluetooth; RF CMOS technology; RF power applications; deep N-well signal pad; device scaling; ground-shielded signal pad; low voltage logic; optimized layout; CMOS logic circuits; CMOS technology; Current measurement; Gain measurement; Low voltage; Noise measurement; Performance gain; Power measurement; Radio frequency; Wireless communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microwave Conference, 2003. 33rd European
  • Print_ISBN
    1-58053-834-7
  • Type

    conf

  • DOI
    10.1109/EUMC.2003.1262982
  • Filename
    1262982
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=402457