DocumentCode
403479
Title
Design of routing-constrained low power scan chains
Author
Bonhomme, Y. ; Girard, P. ; Guiller, L. ; Landrault, C. ; Pravossoudovitch, S. ; Virazel, A.
Author_Institution
Lab. d´´Informatique, de Robotique et de Microelectronique de Montpellier, Univ. de Montpellier II, France
Volume
1
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
62
Abstract
Scan-based architectures, though widely used in modern designs, are expensive in power consumption. Recently, we proposed a technique based on clustering and reordering of scan cells that allows to design low power scan chains according to Y. Bonhomme et al. (2003). The main feature of this technique is that power consumption during scan testing is minimized while constraints on scan routing are satisfied. In this paper, we propose a new version of this technique. The clustering process has been modified to allow a better distribution of scan cells in each cluster and hence lead to more important power reductions. Results are provided at the end of the paper to highlight this point and show that scan design constraints (length of scan connections, congestion problems) are still satisfied.
Keywords
boundary scan testing; circuit layout CAD; cluster tools; low-power electronics; clustering; congestion problems; power consumption; reordering; routing-constrained low power scan chains; scan cells; scan connections; scan design constraints; scan routing; scan testing; scan-based architectures; Automatic testing; Circuit testing; Degradation; Design for testability; Energy consumption; Integrated circuit testing; Robots; Routing; System testing; Uniform resource locators;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1268828
Filename
1268828
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