Title :
A low cost individual-well adaptive body bias (IWABB) scheme for leakage power reduction and performance enhancement in the presence of intra-die variations
Author :
Chen, Tom W. ; Gregg, Justin
Author_Institution :
Syst. VLSI Technol. Organ., Hewlett Packard Co., Fort Collins, CO, USA
Abstract :
This paper presents a new method of adapting body biasing on a chip during post-fabrication testing in order to mitigate the effects of process variations. Individual well biasing voltages can be changed to be connected either to a chip wide well bias or to a different bias voltage through a self-regulating mechanism, allowing biasing voltage adjustments on a per well basis. The scheme requires only one bias voltage distribution network, but allows for back biasing adjustments to more effectively mitigate die-to-die and within-die process variations. The biasing setting for each well is determined using a modified genetic algorithm. Our experimental results show that binning yields as low as 17% can be improved to greater than 90% after using the proposed IWABB method.
Keywords :
CMOS integrated circuits; adaptive control; integrated circuit manufacture; leakage currents; low-power electronics; microprocessor chips; IWABB scheme; back biasing adjustments; bias voltage distribution network; biasing setting; biasing voltage adjustments; body biasing; die-to-die process variations; individual-well adaptive body bias; intradie variations; leakage power reduction; modified genetic algorithm; performance enhancement; post-fabrication testing; self-regulating mechanism; within-die process variations; CMOS technology; Costs; Counting circuits; Energy consumption; Frequency; Manufacturing processes; Power dissipation; Power engineering computing; Very large scale integration; Voltage;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
Print_ISBN :
0-7695-2085-5
DOI :
10.1109/DATE.2004.1268855