DocumentCode :
403526
Title :
Configuration-sensitive process scheduling for FPGA-based computing platforms
Author :
Chen, G. ; Kandemir, M. ; Sezer, U.
Author_Institution :
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., USA
Volume :
1
fYear :
2004
fDate :
16-20 Feb. 2004
Firstpage :
486
Abstract :
Reconfigurable computing has become an important part of research in software systems and computer architecture. While prior research on reconfigurable computing have addressed architectural and compilation/programming aspects to some extent, there is still not much consensus on what kind of operating system (OS) support should be provided. In this paper, we focus on OS process scheduler, and demonstrate how it can be customized considering the needs of reconfigurable hardware. Our process scheduler is configuration sensitive, that is, it reuses the current FPGA configuration as much as possible. Our extensive experimental results show that the proposed scheduler is superior to classical scheduling algorithms such first-come-first-serve (FCFS) and shortest job first (SJF).
Keywords :
field programmable gate arrays; operating systems (computers); processor scheduling; reconfigurable architectures; FPGA configuration; FPGA-based computing platforms; OS support; architectural aspects; compilation-programming aspects; computer architecture; field programmable gate arrats; first-come-first-serve; operating system; process scheduling; reconfigurable computing; reconfigurable hardware; scheduling algorithms; shortest job first; software systems; Computer architecture; Computer science; Field programmable gate arrays; Hardware; Logic arrays; Operating systems; Processor scheduling; Reconfigurable architectures; Scheduling algorithm; Software systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN :
1530-1591
Print_ISBN :
0-7695-2085-5
Type :
conf
DOI :
10.1109/DATE.2004.1268893
Filename :
1268893
Link To Document :
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