• DocumentCode
    403589
  • Title

    DATE panel chips of the future: soft, crunchy or hard?

  • Author

    Paulin, Pierre G.

  • Author_Institution
    Central R&D, STMicroelectron., Ottawa, Ont., Canada
  • Volume
    2
  • fYear
    2004
  • fDate
    16-20 Feb. 2004
  • Firstpage
    844
  • Abstract
    Today´s electronic products are composed of an increasingly diverse set of ICs, ranging from dedicated ASICs, domain-specific ASSPs, platform FPGAs, to general-purpose FPGA´s. With increasing integration, a mix of different fabrics on a single SoC becomes possible, combining ASIC-style standard cells, embedded FPGAs, mask-programmable sea-of-gates, and programmable processors. The panelists will present their vision of the fabric which will dominate SoCs in 90 nm technologies and beyond, based on industrial trends and case studies. They will also outline the key CAD tool challenges for the chosen fabric.
  • Keywords
    application specific integrated circuits; electronic products; field programmable gate arrays; nanotechnology; system-on-chip; 90 nm; 90 nm technology; ASIC; CAD tool; SoC; application specific integrated circuit; application specific standard product; domain specific ASSP; electronic products; field programmable gate array; general purpose FPGA; mask programmable sea-of-gates; platform FPGA; programmable processors; Application specific processors; Costs; Design automation; Fabrics; Field programmable gate arrays; Manufacturing; Productivity; Reduced instruction set computing; Space technology; Time to market;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-2085-5
  • Type

    conf

  • DOI
    10.1109/DATE.2004.1268990
  • Filename
    1268990