Nanometer design: what are the requirements for manufacturing test?

Nanometer technology enables manufacturing of very large SoC designs that have many cores originating from a variety of sources. The challenge here is to integrate different test solutions provided by suppliers of those cores into one comprehensive chip level test. The principal requirement is to reduce the cost of manufacturing test. The DFT methodologies requirement supports high-quality low-cost manufacturing test. The low cost ATE is used for reducing mixed signal test cost. The new fault structures that require detection is done by ATPG engines for test generation and diagnosis.