Title :
Issues in implementing latency insensitive protocols
Author :
Casu, Mario R. ; Macchiarulo, Luca
Author_Institution :
Dipt. di Elettronica, Politecnico di Torino, Italy
Abstract :
A design that works under the assumption of zero-delay connections between functional modules is modified in a latency insensitive design (LID) by encapsulating them within the wrappers ("shells") and connecting them through internally pipelined blocks ("relay stations") complying with a protocol that guarantees identity of behavior.
Keywords :
feedback; feedforward; protocols; system-on-chip; trees (mathematics); feedback; feedforward; functional modules; latency insensitive design; latency insensitive protocols; pipelined blocks; system-on-chip; trees; wrappers; Clocks; Delay; Joining processes; Proposals; Protocols; Registers; Relays; Signal generators; Throughput; Topology;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
Print_ISBN :
0-7695-2085-5
DOI :
10.1109/DATE.2004.1269102
