Title : 
First ic validation of IEEE Std. 1149.6
         
        
            Author : 
Vandivier, Suzette ; Wahl, Mark ; Rearick, Jeff
         
        
            Author_Institution : 
Agilent Technologies
         
        
        
        
            fDate : 
Sept. 30-Oct. 2, 2003
         
        
        
        
            Keywords : 
Circuit faults; Circuit testing; Integrated circuit testing; Logic testing; Noise robustness; Paper technology; Pins; Signal design; Timing; Voltage;
         
        
        
        
            Conference_Titel : 
Test Conference, 2003. Proceedings. ITC 2003. International
         
        
        
            Print_ISBN : 
0-7803-8106-8
         
        
        
            DOI : 
10.1109/TEST.2003.1270890