DocumentCode
403892
Title
Simultaneous bidirectional test data flow for a low-cost wafer test strategy
Author
West, Burnell G.
Author_Institution
NPTest
Volume
1
fYear
2003
fDate
Sept. 30-Oct. 2, 2003
Firstpage
947
Lastpage
951
Keywords
Automatic test pattern generation; Built-in self-test; Circuit testing; Clocks; Costs; Coupling circuits; Data communication; Electronic equipment testing; Investments; Probes;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2003. Proceedings. ITC 2003. International
ISSN
1089-3539
Print_ISBN
0-7803-8106-8
Type
conf
DOI
10.1109/TEST.2003.1271081
Filename
1271081
Link To Document