Title :
A bist solution for the test of I/O speed
Author :
Jia, Cheng ; Milor, Linda
Author_Institution :
Georgia Institute of Technology
fDate :
Sept. 30-Oct. 2, 2003
Keywords :
Automatic testing; Built-in self-test; Circuit testing; Clocks; Costs; Delay effects; Logic testing; Registers; SDRAM; Timing;
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
Print_ISBN :
0-7803-8106-8
DOI :
10.1109/TEST.2003.1271090
