Title :
Fpga interconnect delay fault testing
Author_Institution :
Center for Reliable Computing, Stanford University
fDate :
Sept. 30-Oct. 2, 2003
Keywords :
Circuit faults; Circuit testing; Computer networks; Delay; Fault detection; Field programmable gate arrays; Logic testing; Routing; Switches; Wire;
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
Print_ISBN :
0-7803-8106-8
DOI :
10.1109/TEST.2003.1271113
