• DocumentCode
    403973
  • Title

    Finite-state machine embeddings for non-concurrent error detection and identification

  • Author

    Hadjicostis, Christoforos N.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
  • Volume
    4
  • fYear
    2003
  • fDate
    9-12 Dec. 2003
  • Firstpage
    3215
  • Abstract
    In digital sequential systems that operate over several time steps, a state-transition fault at any time step during the operation of the system corrupts its state in a way that can render its future functionality useless. In this paper, we develop a methodology for systematically constructing redundant finite-state machines so that an external checker can capture transient state-transition faults via checks that are performed in a non-concurrent manner (e.g., periodically). More specifically, the proposed approach allows the checker to detect and identify errors due to past state-transition faults based on an analysis of the current, possibly corrupted FSM state. As a result, the checker in such designs can operate at a slower speed than the rest of the system which relaxes the stringent requirements on its reliability.
  • Keywords
    BCH codes; digital systems; error detection; finite state machines; identification; sequential codes; BCH codes; FSM embeddings; digital sequential systems; error identification; external checker; finite state machine embeddings; nonconcurrent error detection; reliability; transient state transition faults; Arithmetic; Computer errors; Encoding; Fault detection; Fault diagnosis; Fault tolerance; Fault tolerant systems; Memory; Protection; Redundancy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Decision and Control, 2003. Proceedings. 42nd IEEE Conference on
  • ISSN
    0191-2216
  • Print_ISBN
    0-7803-7924-1
  • Type

    conf

  • DOI
    10.1109/CDC.2003.1271638
  • Filename
    1271638