N-MOSFET performance in single and dual channel strained Si/SiGe CMOS architectures

Author

Olsen, S.H. ; Neill, A. G O ; Chattopadhay, S. ; Driscoll, L.S. ; Kwa, K.S.K. ; Paul, D.J. ; Zhang, J.

Author_Institution

Univ. of Newcastle, UK

fYear

2003

fDate

10-12 Dec. 2003

Firstpage

49

Lastpage

50

Abstract

The performance of single and dual channel strained Si n-MOSFETs fabricated using CMOS process. A TEM image of the strained Si/gate oxide interface was examined. Capacitance-voltage measurement on MOS capacitor was investigated. The gate oxide interface trap density as a function of band gap energy for MOS capacitor fabricated on the single and dual channel architectures was illustrated. Field effect mobility was investigated as a function of vertical effective field on MOSFETs having 10 μm gate lengths and 5 μm gate widths.

Keywords

Ge-Si alloys; MOS capacitors; MOSFET; elemental semiconductors; energy gap; interface states; silicon; transmission electron microscopy; 10 micron; 5 micron; MOS capacitor; N-MOSFET; Si-SiGe; Si-gate oxide interface; TEM; band gap energy; capacitance-voltage characteristics; dual channel architectures; dual channel strained Si-SiGe CMOS architectures; field effect mobility; gate oxide interface trap density; Biomedical imaging; CMOS technology; Capacitance-voltage characteristics; Educational institutions; Germanium silicon alloys; MOS capacitors; MOSFET circuits; Rough surfaces; Silicon germanium; Surface roughness;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Device Research Symposium, 2003 International

Print_ISBN

0-7803-8139-4

Type

conf

DOI

10.1109/ISDRS.2003.1271990

Filename

1271990