The Effects of an ADC on SCR Improvement

This paper presents a closed form expression for estimating the signal-to-clutter improvement of a digital signal processor. The expression is unique in that it combines a number of factors (analog-to-digital converter dynamic range, phase noise, integration gain, automatic gain control effects, and clutter filter specifications) that have historically been treated separately. Two standard cases are shown as subsets of the general expression: signal-to-clutter improvement for analog signal processors and moving target indicator-type digital signal processors.