DocumentCode :
405626
Title :
Design technology challenges for system and chip level designs in very deep submicron technologies
Author :
Lin, James
Author_Institution :
National Semicond., Santa Clara, CA, USA
fYear :
2003
fDate :
1-3 Oct. 2003
Firstpage :
194
Abstract :
With very deep submicron process technologies, previously ignorable phenomena now have great impact on the robustness of IC designs. At the same time, the smaller feature sizes also enable an exponential increase in number of functions (or transistor count) available on chip. Complexity in process technology and design is widening the Design Technology gap, which, if not addressed properly, will threaten the continuation of process scaling and the industry´s ability to benefit from it. The complexity of process and design technology, its impact on new designs, new products development and future solutions will be discussed in this presentation.
Keywords :
circuit CAD; integrated circuit design; systems analysis; IC designs robustness; chip level design; complexity; deep submicron technology; design technology gap; process scaling; system level design; transistor count; Biographies; Circuit testing; Design engineering; Electronics industry; Logic design; Logic testing; Process design; Product design; Product development; Robustness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Hardware/Software Codesign and System Synthesis, 2003. First IEEE/ACM/IFIP International Conference on
Conference_Location :
Newport Beach, CA, USA
Print_ISBN :
1-58113-742-7
Type :
conf
DOI :
10.1109/CODESS.2003.1275282
Filename :
1275282
Link To Document :
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