Design and implementation of a new FPGA architecture

FPGA is widely applied in datapath applications, so it´s an important design issue to contrive FPGA architecture fit for datapath circuit implementation. In this paper, we describe a new FPGA architecture - FDEGA (Field-programmable Datapath Enhanced Gate Array). The LC of FDEGA is optimized for datapath implementation and can be programmed as either combinational or sequential device. FDEGA has hierarchical interconnection architecture. A chip with 16*16 LC array has been fabricated, and the design of LC and interconnection has been tested, and circuit sample chosen from practical digital system design has been implemented in FDEGA. The result proves that our design of FDEGA is correct.