DocumentCode :
405773
Title :
Incremental placement algorithm for multi-objective optimization
Author :
Zhuoyuan Li ; Weimin Wu ; Xianlong Hong
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume :
1
fYear :
2003
fDate :
21-24 Oct. 2003
Firstpage :
178
Abstract :
A new incremental placement approach is described in this paper. The obtained timing information drives an efficient net-based placement technique, which dynamically adapts the net weights during successive placement steps. Several methods to combine timing optimization and congestion reducing together are proposed to achieve good result without increasing the computational load. Cells on critical paths are replaced according to timing and congestion constraints. Experimental results show that our approach can efficiently reduce cycle time and enhance route ability. The max path delay is reduced about 13% on an average after incremental placement on wirelength optimized circuits.
Keywords :
VLSI; circuit complexity; circuit optimisation; network routing; VLSI; computational load; congestion constraints; cycle time reduction; incremental placement algorithm; max path delay; multiobjective optimization; net based placement technique; net weights; route ability enhancement; timing optimization; very large scale integration; wirelength optimized circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
ISSN :
1523-553X
Print_ISBN :
0-7803-7889-X
Type :
conf
DOI :
10.1109/ICASIC.2003.1277518
Filename :
1277518
Link To Document :
بازگشت