DocumentCode :
405785
Title :
Property-classified hybrid verification based on CDFG
Author :
Ming Zhu ; Jinian Bian ; Weimin Wu ; Hongxi Xue
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume :
1
fYear :
2003
fDate :
21-24 Oct. 2003
Firstpage :
233
Abstract :
Developing the advantages of simulation and formal verification on CDFG structure, classified properties verification, a new strategy is proposed in this paper: Improving on OVL assertions and CTL descriptions, three types of properties are defined as blank PROCEDUREs in VHDL for simulation, CDFG matching, and model checking, respectively. For ITC99 benchmarks, test properties are designed and verified, and the results confirm that classified properties verifying is practice.
Keywords :
data flow graphs; digital simulation; formal verification; hardware description languages; CDFG matching; CDFG structure; CTL descriptions; ITC99 benchmarks; OVL assertions; VHDL; classified properties hybrid verification; control flow graph; data flow graph; formal verification; model checking; verilog hardware description language;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
ISSN :
1523-553X
Print_ISBN :
0-7803-7889-X
Type :
conf
DOI :
10.1109/ICASIC.2003.1277531
Filename :
1277531
Link To Document :
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