A SoC communication architecture with fine-grained control over bandwidths and latencies

This paper presents a new communication architecture with fine-grained control over bandwidths and latencies. The architecture is designed to address the following limitations of current communication architectures: (i) lack of the service quality control over different types of transactions from the same initiator, leading to poor bandwidth or latency performance, and (ii) lack of mechanism for assigning priorities to bus components. Our technique is based on classifying the bus requests into ports and a mechanism of assigning every port a metric, which determines the probability of accessing the bus during arbitration. We illustrate the designing issues and tradeoffs of this architecture. Experimental results show that the new architecture can better suit the system´s changing communication requirements.