PKURS002: a low power microprocessor core for embedded system

Author

Liu Ling ; Jia Song ; Ji Lijiu

Author_Institution

IME, Peking Univ., Beijing, China

Volume

1

fYear

2003

fDate

21-24 Oct. 2003

Firstpage

463

Abstract

A design of a 32-bit microprocessor core PKURS002 for embedded system is presented in this paper. It consumes much less power yet remains the high performance, compared with its prior PKURS001. The core employs low power design techniques at the controller, data path and internal memorial cells. The controller employs distributed logic instead of centralized one to reduce the signal transition by enlarging the self-loop. A new algorithm LSA (Logarithmic Skip Adder) has been provided to implement ALU and bit-split technique is applied to the structure of register file. The core is described by HDL and verified on 0.35 μm CMOS process. Result shows it reduce 30% power consumption compared with its predecessor at the same performance.

Keywords

adders; embedded systems; hardware description languages; integrated circuit design; low-power electronics; microprocessor chips; power consumption; 0.35 micron; 32 bit; 32 bit microprocessor core; ALU; CMOS process; HDL; LSA; PKURS002; arithmetic logic unit; bit split technique; controller; data path; distributed logic; embedded system; hardware description languages; internal memorial cells; logarithmic skip adder; low power design techniques; low power microprocessor core; power consumption; register file structure; signal transition;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2003. Proceedings. 5th International Conference on

ISSN

1523-553X

Print_ISBN

0-7803-7889-X

Type

conf

DOI

10.1109/ICASIC.2003.1277586

Filename

1277586