PKURS002: a low power microprocessor core for embedded system

A design of a 32-bit microprocessor core PKURS002 for embedded system is presented in this paper. It consumes much less power yet remains the high performance, compared with its prior PKURS001. The core employs low power design techniques at the controller, data path and internal memorial cells. The controller employs distributed logic instead of centralized one to reduce the signal transition by enlarging the self-loop. A new algorithm LSA (Logarithmic Skip Adder) has been provided to implement ALU and bit-split technique is applied to the structure of register file. The core is described by HDL and verified on 0.35 μm CMOS process. Result shows it reduce 30% power consumption compared with its predecessor at the same performance.