DocumentCode
405849
Title
A chaotic circuit for truly random number generation
Author
Bai Guoqiang
Volume
1
fYear
2003
fDate
21-24 Oct. 2003
Firstpage
548
Abstract
In this paper, a chaotic circuit suitable for truly random number generation is proposed. The chaotic dynamical system used in the circuit is implemented based on the charge redistribution of capacitors. This method is better at area and power consumption than most of present methods. The prototype circuit has been fabricated in a standard 0.8 μm CMOS technology. The core size is less than 4200 μm2 and power consumption is less than 1 mW.
Keywords
Chua´s circuit; VLSI; nonlinear dynamical systems; random number generation; 0.8 micron; capacitors charge redistribution; chaotic circuit; chaotic dynamical system; power consumption; truly random number generation;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2003. Proceedings. 5th International Conference on
ISSN
1523-553X
Print_ISBN
0-7803-7889-X
Type
conf
DOI
10.1109/ICASIC.2003.1277608
Filename
1277608
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