Analog to digital converter using successive division intervals

This work presents a new methodology for analog-to-digital conversion by using comparison and voltage shifting. This new methodology is simpler than most analog-to-digital converters and requires simpler blocks. The precision, or number of bits, is given by the number of identical blocks used to implement the converter. Additionally, it is suitable for low voltage operation (as long as the operational amplifiers allow rail-to-rail operation), and meet precision and transmission speed needs required by digital signal processing circuits. In order to verify the feasibility of the technique, an 8-bit converter was implemented. The circuit was implemented in 0.35 μm low voltage CMOS and the whole IC takes an area of 1.81 mm². The results are very encouraging to use this technique for larger number of bits.