Two-stage hot-carrier-induced degradation of p-type LDMOS transistors

Hot-carrier-induced device degradation of high-voltage p-type lateral diffused metal-oxide semiconductor (LDMOS) transistors is investigated. A two-stage linear region drain current (I_Dlin) shift (I_Dlin shift increases rapidly at the beginning of stress but tends to saturate when the stress time is longer) is observed. Technology computer-aided-design simulations and direct current current-voltage measurement results suggest that the decrease of residual fabrication interface traps (N_IT) leads to an initial increase in I_Dlin shift. On the other hand, two competing mechanisms, i.e. increase in N_IT generation and increase in electron trapping, are responsible for the saturated I_Dlin shift when the stress time is longer.