DocumentCode
4069
Title
SPIRIT: Spectral-Aware Pareto Iterative Refinement Optimization for Supervised High-Level Synthesis
Author
Xydis, S. ; Palermo, G. ; Zaccaria, V. ; Silvano, C.
Author_Institution
Inst. of Commun. & Comput. Syst., Nat. Tech. Univ. of Athens, Athens, Greece
Volume
34
Issue
1
fYear
2015
fDate
Jan. 2015
Firstpage
155
Lastpage
159
Abstract
Supervised high-level synthesis (HLS) is a new class of design problems where exploration strategies play the role of supervisor for tuning an HLS engine. The complexity of the problem is increased due to the large set of tunable parameters exposed by the “new wave” of HLS tools that include not only architectural alternatives but also compiler transformations. In this paper, we developed a novel exploration approach, called spectral-aware Pareto iterative refinement, that exploits response surface models (RSMs) and spectral analysis for predicting the quality of the design points without resorting to costly architectural synthesis procedures. We show that the target solution space can be accurately modeled through RSMs, thus enabling a speedup of the overall exploration without compromising the quality of results. Furthermore, we introduce the usage of spectral techniques to find high variance regions of the design space that require analysis for improving the RSMs prediction accuracy.
Keywords
Pareto optimisation; circuit optimisation; electronic engineering computing; high level synthesis; integrated circuit design; learning (artificial intelligence); spectral analysis; HLS engine tuning; SPIRIT; design points quality prediction; exploration strategy; problem complexity; response surface model; spectral analysis; spectral aware Pareto iterative refinement optimization; supervised high level synthesis; Accuracy; High level synthesis; Measurement; Optimization; Space exploration; Spectral analysis; Training; Design space exploration (DSE); design space exploration; high level synthesis; high-level synthesis (HLS); machine learning; spectral analysis; system level design;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2014.2363392
Filename
6930749
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