DocumentCode :
40739
Title :
Evaluation and FPGA Implementation of Sparse Linear Solvers for Video Processing Applications
Author :
Greisen, Pierre ; Runo, Marian ; Guillet, Patrice ; Heinzle, Simon ; Smolic, Aljoscha ; Kaeslin, Hubert ; Gross, Markus
Volume :
23
Issue :
8
fYear :
2013
fDate :
Aug. 2013
Firstpage :
1402
Lastpage :
1407
Abstract :
Sparse linear systems are commonly used in video processing applications, such as edge-aware filtering or video retargeting. Due to the 2-D nature of images, the involved problem sizes are large and thus solving such systems is computationally challenging. In this paper, we address sparse linear solvers for real-time video applications. We investigate several solver techniques, discuss hardware trade-offs, and provide field-programmable gate array (FPGA) architectures and implementation results of a Cholesky direct solver and of an iterative BiCGSTAB solver. The FPGA implementations solve 32 k × 32 k matrices at up to 50 f/s and outperform software implementations by at least one order of magnitude.
Keywords :
field programmable gate arrays; video signal processing; Cholesky direct solver; FPGA implementation; edge-aware filtering; field-programmable gate array architectures; hardware trade-offs; iterative BiCGSTAB solver; real-time video applications; sparse linear solvers; sparse linear systems; video processing applications; video retargeting; Bandwidth; Computer architecture; Field programmable gate arrays; Hardware; Linear systems; Sparse matrices; Vectors; BiCGSTAB solver; cholesky solver; computer architecture; energy minimization; field programmable gate arrays; hardware; high performance computing; parallel processing; regularization; video applications;
fLanguage :
English
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
1051-8215
Type :
jour
DOI :
10.1109/TCSVT.2013.2244797
Filename :
6428634
Link To Document :
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