Automatic generation of standard cell library in VDSM technologies

Author

Hashimoto, Masanori ; Fujimori, Kazunori ; Onodera, Hidetoshi

Author_Institution

Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan

fYear

2004

fDate

2004

Firstpage

36

Lastpage

41

Abstract

We developed standard cell libraries for three technologies (130, 180 and 350 nm) using an automatic layout generation tool that we have developed. The automatic layout generation tool is improved so as to cope with phase shift mask and mismatch between transistor pitch and wire pitch, which appear commonly in VDSM technologies. The developed libraries are as competitive as manually-designed libraries in layout density and speed. The libraries are currently public to educational organizations in Japan after we verified the functionalities of all cells and the speed of basic combinational cells on the fabricated chips.

Keywords

circuit CAD; combinational circuits; integrated circuit layout; logic CAD; phase shifting masks; 130 nm; 180 nm; 350 nm; VDSM technologies; automatic cell library generation; automatic layout generation tool; combinational cells speed; layout density; layout speed; phase shift mask; standard cell library; transistor/wire pitch mismatch; Application specific integrated circuits; Circuit optimization; Communication standards; Design methodology; Design optimization; Educational technology; Libraries; Manufacturing; Standards development; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality Electronic Design, 2004. Proceedings. 5th International Symposium on

Print_ISBN

0-7695-2093-6

Type

conf

DOI

10.1109/ISQED.2004.1283647

Filename

1283647