DocumentCode
40760
Title
BonnPlace Legalization: Minimizing Movement by Iterative Augmentation
Author
Brenner, Ulrich
Author_Institution
Res. Inst. for Discrete Math., Univ. of Bonn, Bonn, Germany
Volume
32
Issue
8
fYear
2013
fDate
Aug. 2013
Firstpage
1215
Lastpage
1227
Abstract
We describe BONNPLACELEGAL, an algorithm for VLSI placement legalization. Based on a minimum-cost flow algorithm that iteratively augments flows along paths, our approach ensures that only augmentations are considered that can be realized exactly by cell movements. Hence, this method avoids realization problems that are inherent to previous flow-based legalization algorithms. As a result, it combines the global perspective of minimum-cost flow approaches with the efficiency of local search algorithms. The tool is mainly designed to minimize total and maximum cell movement, but it is flexible enough to optimize other objective functions provided that the effect of single cell movements on them can be estimated efficiently. We compare our approach to legalization tools from industry and academia by experiments on dense recent real-world designs and public benchmarks. The results show that we are much faster and produce significantly better results in terms of average (linear and quadratic) and maximum movement than any other tool. The experiments also demonstrate that by minimizing squared movement we also produce a smaller increase in net length than the other tools.
Keywords
VLSI; iterative methods; minimisation; search problems; BONNPLACE legalization; BONNPLACELEGAL algorithm; VLSI placement legalization; cell movement; flow-based legalization algorithm; iterative augmentation; legalization tool; local search algorithm; minimum-cost flow algorithm; squared movement minimization; Algorithm design and analysis; Linear programming; Marine vehicles; Optimization; Partitioning algorithms; Standards; Timing; Legalization; network flow algorithm; overlap removal; physical design; placement;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2013.2253834
Filename
6559150
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