Title :
A low power frequency synthesizer with an integrated negative transconductance LC-tuned VCO
Author :
Waheed, Khurram ; Desai, Keyur ; Salem, Fathi M.
Author_Institution :
Circuits, Syst. & Neural Networks Lab., Michigan State Univ., East Lansing, MI, USA
Abstract :
A low-power 900 MHz GSM frequency synthesizer (FS), with an on-chip LC-tuned voltage controlled oscillator (VCO) is presented. The synthesizer possesses several novel features that include a completely integrated structure, a low phase noise on-chip LC VCO, a low-power dual-modulus divider (DMD) in CML topology, a compensated charge pump with balanced switching, an on-chip third order loop filter and a proposed relatively easy to implement fractional accumulator based frequency synthesis technique. The complete synthesizer achieves in-bandphase noise characteristics better than -110 dBc/Hz at 100 kHz offset. The channel switching time is less than 500 μs for a 25 MHz frequency transition. The proposed architecture has been realized using the 0.5 μm AMI C5N technology. The complete integrated synthesizer occupies less than 1500 x 700 μm2 of die real estate with 22 mW power dissipation.
Keywords :
current-mode logic; frequency synthesizers; network topology; voltage-controlled oscillators; 900 MHz; CML topology; LC-tuned VCO; balanced switching; channel switching time; charge pump; fractional accumulator; frequency synthesis technique; frequency transition; in-bandphase noise characteristics; integrated negative transconductance; low power frequency synthesizer; low-power dual-modulus divider; on-chip third order loop filter; 1f noise; Charge pumps; Filters; Frequency conversion; Frequency synthesizers; GSM; Phase noise; Topology; Transconductance; Voltage-controlled oscillators;
Conference_Titel :
Robotics, Intelligent Systems and Signal Processing, 2003. Proceedings. 2003 IEEE International Conference on
Print_ISBN :
0-7803-7925-X
DOI :
10.1109/RISSP.2003.1285639