DocumentCode
40825
Title
Analysis of Pull-in Range Limit by Charge Pump Mismatch in a Linear Phase-Locked Loop
Author
Yoshimura, Tetsuzo ; Iwade, Shuhei ; Makino, Hiroaki ; Matsuda, Yuuki
Author_Institution
Department of Electrical and Electronic Engineering, Osaka Institute of Technology, Asahi-ku, Omiya, Osaka, Japan
Volume
60
Issue
4
fYear
2013
fDate
Apr-13
Firstpage
896
Lastpage
907
Abstract
In this paper, we show the relationship between the pull-in range of a linear phase-locked loop (PLL) and the current mismatch of the charge pump that controls the frequency of the oscillator in the PLL. We evaluate the pull-in range of the PLL based on a nonlinear behavioral model of the pull-in process with three types of phase detectors. We introduce the mismatch error to the charge pump current in the PLL and study the impact of this error on the pull-in range. We also apply the mismatch error to a nonlinear differential equation that describes the loop dynamics of the PLL and calculate the pull-in range under this mismatch condition. We validate the limitations of the pull-in range due to the current mismatch by a numerical simulation with MATLAB.
Keywords
Clocks; Detectors; Frequency control; Frequency locked loops; Mathematical model; Phase locked loops; Voltage-controlled oscillators; Clock and data recovery PLL (CDR-PLL); dual loop; lock-in range; nonlinear differential equation; pull-in range;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2012.2215393
Filename
6298056
Link To Document