DocumentCode :
408427
Title :
2.4 GHz CMOS VCO design with Verilog-AMS
Author :
Cheng, Kuo-hua ; Jou, Christina F.
Author_Institution :
Terax Commun. Technol. Inc., Hsinchu, Taiwan
fYear :
2003
fDate :
9-11 Dec. 2003
Firstpage :
98
Lastpage :
101
Abstract :
The Verilog-AMS language is a high-level language that uses modules to describe the structure and behavior of analog systems and their components. It is an extension to IEEE 1364 Verilog Hardware Description Language (HDL). This paper presents a 2.4 GHz VCO model by Verilog-A for IP and SoC purpose. It fabricated by TSMC 0.25-μm; based on the measurement results, the tuning range is 187 MHz (7.78%); phase noise is 91dBc/HZ@1 MHz offset at 2.4 GHz.
Keywords :
BiCMOS integrated circuits; circuit tuning; codes; integrated circuit design; phase noise; voltage-controlled oscillators; 1 MHz; 2.4 GHz; CMOS VCO design; Verilog-AMS language; phase noise; tuning; verilog hardware description language; Circuit simulation; Communications technology; Hardware design languages; Inductors; MOSFETs; Noise measurement; Phase measurement; Phase noise; Tuning; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN :
977-05-2010-1
Type :
conf
DOI :
10.1109/ICM.2003.1287731
Filename :
1287731
Link To Document :
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