DocumentCode :
408438
Title :
A test structure for characterization of CMOS APS
Author :
Elkhatib, T.A. ; Moussa, S. ; Ragaie, H.F. ; Haddara, H.
Author_Institution :
Fac. of Eng., Cairo Univ., Giza, Egypt
fYear :
2003
fDate :
9-11 Dec. 2003
Firstpage :
151
Lastpage :
154
Abstract :
A test structure to characterize CMOS APS image sensor is presented. Individual photodiodes and pixels as well as an image sensor array of 64×64 active pixels with selectable linear or logarithmic operation modes are designed. A test chip includes these features in addition to on-chip timing and control digital circuits as well as correlated double sampling have been built on a 0.6 μm CMOS process. The test methodology and preliminary simulation results are presented.
Keywords :
CMOS image sensors; digital integrated circuits; photodiodes; semiconductor device models; 0.64 micron; APS testing; CMOS APS image sensor; active pixels; control digital circuits; image sensor array; linear operation modes; logarithmic operation modes; photodiodes; CMOS image sensors; Circuit testing; Digital circuits; Digital control; Image sampling; Image sensors; Photodiodes; Pixel; Sensor arrays; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN :
977-05-2010-1
Type :
conf
DOI :
10.1109/ICM.2003.1287746
Filename :
1287746
Link To Document :
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