High-speed system bus for a SoC network processing platform

Author

Bissou, Jean Pepga ; Dubois, Mathieu ; Savaria, Yvon ; Bois, Guy

Author_Institution

Dept. of Electr. Eng., Ecole Polytech. Montreal, Que., Canada

fYear

2003

fDate

9-11 Dec. 2003

Firstpage

194

Lastpage

197

Abstract

Interconnecting modules in a SoC platform requires modules compatibility. Several solutions are available, but they either lack the necessary throughput or the flexibility. This paper proposes an interconnection architecture for a flexible on-chip high-performance communication medium that can provide variable bandwidth. It is based on the AHB AMBA bus. The proposed architecture has been implemented in the Seamless environment and laid out using a 0.18 μm CMOS with Cadence tools to validate the proposed concept.

Keywords

CMOS digital integrated circuits; multiprocessor interconnection networks; open systems; software tools; system buses; system-on-chip; 0.18 micron; CMOS; Cadence tools; SoC network processing platform; flexible on-chip high-performance communication medium; high-speed system bus; interconnecting modules; variable bandwidth; Bandwidth; CMOS technology; Communication standards; Communication switching; Integrated circuit interconnections; Process design; Switches; Switching circuits; System buses; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on

Print_ISBN

977-05-2010-1

Type

conf

DOI

10.1109/ICM.2003.1287765

Filename

1287765